Introduction
The currently strongly growing field of cybersecurity is a major concern. As chips are often produced by third-party manufacturers, IP owners have to identify and exclude hardware trojans in their ICs to be able to guarantee safety to their customers. RAITH CHIPSCANNER offers a unique large area high resolution imaging capability for 2D /3D stitching and image to CAD conversion.
Application
Integrated circuit analysis
IC analysis requires the best solution for resolution, accuracy, and stability. All these properties overlap with the requirements for the nanofabrication systems that Raith has supplied since the 1980s. While traditional SEM instruments are usually limited by small, uncalibrated fields of view (FOVs) and do not offer precise sample positioning, Raith’s CHIPSCANNER provides a solution for scanning surfaces up to cm² areas with nm resolution and excellent layer-to-layer accuracy, and therefore for the precise layout extraction or 3D modeling needed in integrated circuit analysis.
Metalens structure using efficient formula based patterningMetalens structure using efficient formula based patterningMetalens structure using efficien
150 nm gate in PMMA (bi-layer)
Freestanding multi-terminal graphene device M. Kühne, MPI Stuttgart, Germany
Application
IC anti counterfeiting
RAITH also supports customers in the growing field of cybersecurity. As chips are often produced by third-party manufacturers, IP owners have to identify and exclude hardware trojans in their ICs to be able to guarantee safety to their customers.
Metalens structure using efficient formula based patterningMetalens structure using efficient formula based patterningMetalens structure using efficien
150 nm gate in PMMA (bi-layer)
Freestanding multi-terminal graphene device M. Kühne, MPI Stuttgart, Germany
Application
Design verification / reverse engineering (obsolesence)
CHIPSCANNER is the perfect solution for reverse engineering and design verification. CHIPSCANNER is equipped with a laser-interferometer stage, low kV UHR-SEM column, high-speed SE/BSE detectors, which provide high-resolution and artefact-free large-area panoramic images in 2D- and 3D. Whole chips can be scanned at nm resolution and excellent layer to layer accuracy for 3D-model, layout and schematic extraction. For IC layout reconstruction, software tools are available to extract valuable CAD-data from the images for further processing.
Metalens structure using efficient formula based patterningMetalens structure using efficient formula based patterningMetalens structure using efficien
150 nm gate in PMMA (bi-layer)
Freestanding multi-terminal graphene device M. Kühne, MPI Stuttgart, Germany
Application
Patent / IP infringment
The protection of intellectual property is mandatory in an increasingly competitive environment. Chip manufacturers often include a certain pattern without functionality in their chip design; the presence of this pattern on a competitor’s chip can be proof of copyright violation. CHIPSCANNER provides artefact-free large-area-SEM-imaging capabilities which can be used to acquire panoramic high-resolution images of full devices on a nanometer scale without any stitching errors.
Metalens structure using efficient formula based patterningMetalens structure using efficient formula based patterningMetalens structure using efficien
150 nm gate in PMMA (bi-layer)
Freestanding multi-terminal graphene device M. Kühne, MPI Stuttgart, Germany